Mmc/Sd Host Controller Features - Texas Instruments OMAP5910 Technical Reference Manual

MMC/SD Host Controller

7.12.1 MMC/SD Host Controller Features

7.12.2 MMC/SD Host Controller Signals Pads
7-122
Main features of the controller are:
-
Full compliance with MMC command/response sets as defined in the
MMC standard specification [1]
-
Full compliance with SD command/response sets as defined in the SD
Physical Layer specification [2]
-
Flexible architecture allowing support for new command structure
-
Separate SPI interface with 3 C/S. Provides supports for up to three serial
devices such as serial flash
-
Built-in 64-byte FIFO for buffered read or write
-
16-bit-wide accesses bus to maximize bus throughput
-
Designed for low power
-
Wide interrupt capability
-
Programmable clock generation
-
Two DMA channels
Known limitations:
-
No built-in hardware support for error correction codes (ECC)
-
No built-in support for card detection
-
No full compliance to SDIO specification.
The signal pads, listed in Table 7–91, describe the physical interface between
OMAP5910—the transceiver—and the target MMC/SD memory card(s) or
serial flash memories.
The transceiver provides dc-level adaptation functions between OMAP5910
and the target devices.
The state of the OMAP5910 static_valid input during power on, determines the
functional multiplexing on the OMAP5910 MMC/SD pads.
The OMAP5910 static_valid pad must be held to 1 during power on so that the
MMC/SD host controller signals are usable from the power-on reset on the
OMAP5910 MMC/SD pads (described in Table 7–91).
This functional multiplexing, which is configured in static, does not concern the
SPI signals, which are multiplexed on the GPIO pads. For these pads, the
functional multiplexing is done classically by programming an OMAP5910
configuration register.