Lcd Bottom Address For Frame Buffer 1 Register-Lower Bits Register; Lcd Bottom Address For Frame Buffer 1 Register-Upper Bits Register - Texas Instruments OMAP5910 Technical Reference Manual

Registers
5.6.1.2 LCD Bottom Address for Frame Buffer 1 Registers (DMA_LCD_BOT_F1_L and
DMA_LCD_BOT_F1_
Table 5–28. LCD Bottom Address for Frame Buffer 1 Register—Lower Bits Register
(DMA_LCD_BOT_F1_L)
Bit Name
15–1 LCD_BOT_F1_
L[15–1]
0 LCD_BOT_F1_
L[0]
Table 5–29. LCD Bottom Address for Frame Buffer 1 Register—Upper Bits Register
(DMA_LCD_BOT_F1_U)
Bit Name
15–0 LCD_BOT_F1_
L[31–16]
5-56
The LCD bottom address registers are two 16-bit registers that contain the
bottom address for the video RAM buffer 1. The 32-bit address is obtained by
the concatenation of the two 16-bit words as described here:
LCD_BOTTOM_F1 = DMA_LCD_BOT_F1_U and DMA_LCD_BOT_F1_L
Note:
LSB of the 32-bit word is equal to zero. Address of video buffer must always
be even.
Description
LCD bottom address for frame buffer 1 lower bits [15–1]
Address bit 0. Fixed at 0 since address must be even.
Description
LCD bottom address for frame buffer 1 upper bits [31–16]
Reset
Type
Value
RW Undefined
R 0
Reset
Type
Value
RW Undefined