Mpui Registers - Texas Instruments OMAP5910 Technical Reference Manual

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MPUI Registers

Table 2–48. MPUI Registers

DSP_STATUS_REG

DSP_BOOT_CONFIG

DSP_API_CONFIG

In SAM, all the DSP internal memory is accessible by the MPUI interface. If

both the DSP and the MPU controllers (TI925T and system DMA) access the

same memory at the same time, priority is given to the DSP controllers. The

access is synchronized to the internal DSP CPU clock.

HOM is more efficient than SAM, because there is no synchronization in-

volved. However, HOM depends on the host operating frequency, which is nor-

mally slower than the internal DSP CPU clock. The system software can switch

between HOM and SAM or vice versa, if desired, and it is up to the software

to manage the system resources.

Note: MPUI Port Accesses

MPUI port accesses to the DSP subsystem external address space via the

DSP MMU are not supported. MPU and system DMA should access all traffic

controller resources (EMIFS, EMIFF, and IMIF) directly through the traffic

controller and not via the MPUI port and DSP MMU.

Table 2–48 lists the MPUI registers. Table 2–49 through Table 2–56 describe

the register bits.

Debug address—has the address from

last operation in case an abort occurs.

Debug data —has the data from last op-

eration in case an abort occurs.

MPUIF status

Current DSP status

Boot DSP configuration

MPUI size information

MPU Subsystem

MPU Interface