Gpio_Int Register Read Timing; Gpio Interrupt Masking - Texas Instruments OMAP5910 Technical Reference Manual

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Figure 7–13. GPIO_INT Register Read Timing

The GPIO_INT read

asynchronously resets the

gpios_int interrupt.

GPIO_INT read occurs during the

clk_32 kHz high level. The GPIO_INT

reset is released immediately.

The GPIO interrupt mask register (GPIO_MASKIT) can mask the edge

detection on the MPU I/O inputs.

This mask is applied asynchronously on each detected edge after debounc-

ing. If all the edges detected are masked, then the gpios_int interrupt is

Masking one MPU I/O input forces its corresponding debouncing value to 0,

which ensures that gpios_int is generated three cycles after the corresponding

detected edge.

To ensure that this force is active from the start of the edge detection, the mask

must be present two cycles before the detected edge. In this case, the interrupt

is generated three cycles after the detected edge (see the corresponding

timing in Figure 7–14). Otherwise, the mask can be activated during the

GPIO_INT read occurs during

the clk_32 kHz low level. The

GPIO_INT reset is released on

the next clk_32 kHz high level.