Memory Interface Traffic Controller - Texas Instruments OMAP5910 Technical Reference Manual

Memory Interface Traffic Controller

This chapter describes the OMAP5910 multimedia processor memory
interface traffic controller (TC).
Topic
4.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.2 Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.3 Memory Interfaces
4.4 Traffic Controller Memory Interface Registers
4.5 Interfacing Memories With the OMAP5910 Device
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 4
Page
4-2
4-6
4-12
. . . . . . . . . . . . . . . . . . 4-42
. . . . . . . . . . . . . . . 4-57
4-1