I2C Registers - Texas Instruments OMAP5910 Technical Reference Manual

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2
7.8.2.7
I
C Registers
2
Table 7–52. I
C Registers
2
Table 7–52 lists the I
C registers. Table 7–53 through Table 7–71 describe the
register bits.
Register
I2C_REV
I2C_IE
I2C_STAT
I2C_IV
Reserved
I2C_BUF
I2C_CNT
I2C_DATA
Reserved
I2C_CON
I2C_OA
I2C_SA
I2C_PSC
I2C_SCLL
I2C_SCLH
I2C_SYSTEST
2
The read-only I
C module version register (I2C_REV) contains the hard coded
revision number of the module. A write to this register has no effect.
This 8-bit field (7:0) indicates the revision number of the current I
module. Its value is fixed by hardware and corresponds to the RTL revision of
this module.
The four LSBs indicate a minor revision.
Description
2
I
C module version
2
I
C interrupt enable
2
I
C status
2
I
C interrupt vector
2
I
C buffer configuration
2
I
C data counter
2
I
C data access
2
I
C configuration
2
I
C own address
2
I
C slave address
2
I
C clock prescaler
2
I
C SCL low time control
2
I
C SCL high time control
2
I
C system test
Inter-Integrated Circuit Controller
Access
R
R/W
R
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
2
MPU Public Peripherals
Offset
Address
0x00
0x04
0x08
0x0C
0x10
0x14
0x18
0x1C
0x20
0x24
0x28
0x2C
Ox30
0x34
0x38
0x3C
C controller
7-67

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