Master Receiver Mode, Rm = 0, Polling - Texas Instruments OMAP5910 Technical Reference Manual

Figure 7–36. Master Receiver Mode, RM = 0, Polling
Read I 2 C_STAT.
No
Write I 2 C_CON
Read I 2 C_STAT.
ACK returned
STT and STP are
cleared to 0 by hardware.
Start
Is
Bus free
(BB=0)
?
Yes Set appropriate values to every
bit of I 2 C_CON. I 2 C_EN bit must be set
to 1 to take I 2 C out of reset condition. Setting
with 8403h.
I 2 C_EN and setting other mode bits can be done
simultaneously.
Is
Yes
(NACK=0)
?
No
Reprogram
the registers.
STT = 1
No
STP = 1
(new start)
?
?
Yes
End
[EXPECTED COMMAND]
At the beginning,
(STT,STP) = (1.0), (1.1), (1.0), (1.1)
in the middle,
(STT, STP) = (0.0), (0.1)
At the end,
(STT, STP) = (0.1)
[EXPECTED I 2 C_IE]
I 2 C_IE = 00000b
Can
update the
No
registers
(ARDY=1)
?
Yes
No
Yes
The I 2 C goes into slave receiver mode.
Inter-Integrated Circuit Controller
Is
received data
No
in I 2 C_DATA
(RRDY=1)
?
Yes
Read I 2 C_DATA.
MPU Public Peripherals 7-93