Timing Chart Of Image Data Transfer (Polclk = 1) - Texas Instruments OMAP5910 Technical Reference Manual

Camera Interface
Figure 7-4. Timing Chart of Image Data Transfer (POLCLK = 1)
CAM_VS
CAM_HS
CAM_LCLK
CAM_D
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Image
7.2.1.2 Autostart
7.2.1.3 Reset FIFO
7-6
If either CAM_VS or CAM_HS goes inactive before receiving all four bytes, the
data in buffers is cleared by the active CAM.LCLK edge and is not written into
FIFO.
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Autostart is a protection function that prevents a start of capture during an
image transfer. Autostart is launched after enabling the LCLK and waits for the
next inactive level of CAM_VS to enable the data capture, so that the transfer
starts at the beginning of the image.
Note:
If a reset FIFO occurs (see Section 7.2.1.3) while the interface is latching
data, the capture is automatically disabled and the autostart function is
enabled.
An active-high reset FIFO is implemented at bit 18, RAZ FIFO, of the camera
mode register. This feature clears any remaining data in the FIFO before start-
ing a new transfer. It also resets all status and control signals around the FIFO
such as the read and write pointers, the FIFO full interrupt, the FIFO peak
counter, and the 32-bit resynchronization registers.
Before the FIFO is reset via the RAZ_FIFO bit, CAM.LCLK needs to be
disabled by setting CTRLCLOCK[7] = 0. Then RAZ_FIFO may be set
(MODE[7] = 1) to reset the FIFO. Then RAZ_FIFO must be set back to inactive
(MODE[7] = 0) before the camera interface is functional.
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