Master Receiver Mode, Rm = 0, Dma - Texas Instruments OMAP5910 Technical Reference Manual

Figure 7–40. Master Receiver Mode, RM = 0, DMA
No
cleared to 0 by hardware.
Start
Read I 2 C_STAT.
Is
Bus free
(BB=0)
?
Set appropriate values to every
Yes
bit of I 2 C_CON. I 2 C_EN bit must be set
to 1 to take I 2 C out of reset condition. Setting
Write I 2 C_CON
I 2 C_EN and setting other mode bits can be done
with 8403h.
simultaneously.
Is I 2 C
interrupt
received
No
?
Read I 2 C_STAT.
Is
Yes
ACK returned
(NACK=0)
?
No
STT and STP are
Reprogram
the registers.
STT = 1
No
STP = 1
(new start)
?
Yes
[EXPECTED COMMAND]
At the beginning,
(STT,STP) = (1.0), (1.1), (1.0), (1.1)
in the middle,
(STT, STP) = (0.0), (0.1)
At the end,
(STT, STP) = (0.1)
[EXPECTED I 2 C_IE]
I 2 C_IE = 00111b
No
Is
DMA
Yes
interrupt
received
?
Are
n bytes
No
transferred
(ARDY=1)
?
Yes
No
?
Yes
The I 2 C goes into slave receiver mode.
End
Inter-Integrated Circuit Controller
Take necessary
actions.
MPU Public Peripherals 7-97