Mmc Command Register (Mmc_Cmd) - Texas Instruments OMAP5910 Technical Reference Manual

Table 7–95. MMC Command Register (MMC_CMD)
Bit Name
15 DDir
14 SHR
13 –12 Type
11 Busy
10– 8 Response
7 Init
6 OD
5 – 0 Cmd_Index
Data Direction (DDir)
Description
Data direction [read/write]
Stream command or broadcast host response
Command types [bc,bcr,ac,adtc]
Command with busy response [R1b]
Command responses [no response, R1/R1b, R2, R3, R4, R5,R6]
Send initialization stream
Card open drain mode
Command index [63:0]
A write to the MMC command register (MMC_CMD) sends a command to the
card. If the local host accesses this register byte-wise, the command is sent
to the card only after a write access to the least significant LSB (bits 7:0).
Hence, the MSB must always be written first in a byte-accessed situation.
A read has no effect except to return the last command that was previously
sent.
Note:
A write into this register with Type = adtc resets the FIFO pointers and pre-
fetch register. Writes with other type values (bc, bcr, ac) do not affect the
FIFO contents. Hence, data must be written inside the FIFO after sending
a single or multiple block write command.
A write into this register also clears the MMC_RSP[07] registers.
This bit (15) specifies if the data transfer is a read or a write. This bit is only valid
if the command type is adtc.
This bit has the same polarity as RD/WR argument bit 0 for a GEN_CMD
command (CMD56).
-
0: Data write
-
1: Data read
Value after reset is low.
MMC/SD Host Controller
MPU Public Peripherals 7-127