Mpu Ti Peripheral Bus Bridge Connections - Texas Instruments OMAP5910 Technical Reference Manual

2.10 MPU TI Peripheral Bus Bridges
Figure 2–23. MPU TI Peripheral Bus Bridge Connections
System
DMA
controller
MPU
2.10.1 8-Bit, 16-Bit, and 32-Bit Word Access
The MPU TI peripheral bus (TIPB) bridges (see Figure 2–23) connect the
TI925T to its peripherals. Two MPU TIPBs, one private and one nonprivate or
public, are implemented to reduce access latency and improve system perfor-
mance. Concurrent transfers are possible if there are no resource conflicts; for
example, DMA transfers to the public TIPB and the TI925T both access the
private TIPB simultaneously. The timers are connected on the private periph-
eral bus for low-latency access by an operating system, and the camera is
located on the public peripheral bus for access by the DMA.
The private and public peripheral bridges are compatible with the TIPB
specification.
Logic
Mux
Logic
Mux
The MPU TIPB handles 8-bit, 16-bit, and 32-bit word accesses. Data is loaded
and stored in little endian fashion. Data is always right-justified on the TIPB.
MPU TI Peripheral Bus Bridges
TI peripheral bus)
TI
peripheral
32
bus
bridge
Private TI peripheral bus)
(private)
TI
peripheral
Public TI peripheral bus
32
bus
bridge
(shared)
TI peripheral bus
MPU Subsystem 2-65