Interpreting Page Table Entry Bits - Texas Instruments OMAP5910 Technical Reference Manual

MPU Memory Management Unit
Table 2–22. Interpreting Page Table Entry Bits 1–0
2.7.6.6 Translating Tiny Pages References
2-36
Value Meaning
00 Invalid
01 Large page
10 Small page
11 Tiny page
Figure 2–16 illustrates the complete translation sequence for a 1K-byte tiny
page. Page translation involves one additional step beyond that of a section
translation; the level 1 descriptor is the page table descriptor and is used to
point to the level 2 descriptor or page table entry. For pages, the access per-
missions are contained in the level 2 descriptor and must be checked before
the physical address is put on the s_add bus.
Notes
Generates a page translation fault
Indicates a 64K-byte page
Indicates a 4K-byte page
Indicates a 1K-byte page