HDQ and 1-Wire Protocols
7.15.1.3
Write State Diagram
Figure 7–68. Write State Machine #1
Time out = 0
Go = 0
7.15.1.4
Read State Diagram
Figure 7–69. Read State Machine #1
Time out = 1
Go = 1
7-192
Reset
IDLE
Reset
IDLE
Go = 0
Time out
Rnw = 0, Go = 1
Rnw = 0, Go = 1
Time out, HDQ = 1
Bits sent < 8
TX complete = 0
TX
Time out = 0
Write data
TX complete = 1
TX complete
Time out = 0
Receiving
< 8 bits