Single-Channel/Alternate Long Framing; Single-Channel/Alternate Long Framing/Burst - Texas Instruments OMAP5910 Technical Reference Manual

9.5.1.7 Functional Mode Timing Diagrams

Single-Channel/Alternate Long Framing

Figure 9–16. Single-Channel/Alternate Long Framing
CLK
FSYNCH
TXD
T7 T6
RXD
R7 R6

Single-Channel/Alternate Long Framing/Burst

Figure 9–17. Single-Channel/Alternate Long Framing/Burst
CLK
FSYNCH
TXD
T7
RXD
R7
The following timing diagrams are based on a positive clock polarity with
parameter CLOCK_POL = 0.
(Transmit on rising edge/receive on falling edge)
T5 T4 T3 T2 T1
R5 R4 R3 R2 R1
First frame
T6 T5 T4 T3 T2
R6 R5 R4 R3 R2
OVER_CLOCK_REG = 0x0003
T0 T7 T6 T5 T4
R0 R7 R6 R5 R4
T1 T0
R1 R0
DSP Public Peripherals
Multichannel Serial Interfaces
T3 T2 T1 T0
R3 R2 R1 R0
Last frame
T7 T6 T5 T4
R7 R6 R5 R4 R3
T3 T2
R2
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