Spi Mode C/S Timings Controls (Pol = 0); Spi Mode C/S Timings Controls (Pol = 1) - Texas Instruments OMAP5910 Technical Reference Manual

MMC/SD Host Controller
Figure 7–50. SPI Mode C/S Timings Controls (POL = 0)
SPI shift clock
(module generated
Internal clock)
SPI_CLK
(POL=0)
SPI_CSn[3:0]
Figure 7–51. SPI Mode C/S Timings Controls (POL = 1)
SPI shift clock
(module generated
Internal clock)
SPI_CLK
(POL=1)
SPI_CSn[3:0]
Chip-Select Control (CS)
7-152
Encoded value (bits 5-4) that selects the device being targeted for SPI transfer.
-
00: Reserved (no device is selected)
-
01: C/S 1
-
10: C/S 2
-
11:C/S 3
Values after reset are low (2 bits).
TCSS = 1
TCSH = 0.5
TCSS = 2
TCSH = 1.5
TCSS = 3 TCSH = 2.5
TCSS = 4
TCSH = 3.5
TCSS = 1
TCSH = 0.5
TCSS = 2 TCSH = 1.5
TCSS = 3
TCSH = 2.5
TCSS = 4
TCSH = 3.5