Mmc Buffer Configuration Register (Mmc_Buf) - Texas Instruments OMAP5910 Technical Reference Manual

MMC/SD Host Controller
Table 7–109. MMC Buffer Configuration Register (MMC_BUF)
Bit Name
15 RX_DMA_En
14 –13 Reserved
12 –8 AF_Level
7 TX_DMA_En
6–5 Reserved
4 –0 AE_Level
Receive DMA Channel Enable (RX_DMA_En)
Buffer Almost Full Level (AF_Level)
7-148
This register configures the buffer threshold level of the thirty two 16-bit-word
FIFO and enables DMA transfers.
Description
Receive DMA channel enable
Buffer almost full level
Transmit DMA channel enable
Buffer almost empty level
When this bit (15) is set to 1, the receive DMA channel is enabled and the
A_Full status bit is forced to 0 by the core irrespectively of AF_level setting (see
Table 7–109).
-
0: Receive DMA channel disabled
-
1: Receive DMA channel enabled
Value after reset is low.
This register (bits 12-8) holds the programmable almost full level value used
to determine almost full buffer condition. If you want an interrupt or a DMA read
request to be issued during a read operation when the data buffer holds
n words of 16 bits, then AF_Level must be set with n-1.
-
0x00 1 16-bit word (2 bytes)
-
0x1E: 31 16-bit word (62 bytes)
-
0x1F: 32 16-bit word (64 bytes)
Values after reset are 0x1F.