External Memory Interconnection Using Hitachi Flash Memory - Texas Instruments OMAP5910 Technical Reference Manual

Figure 4–20. External Memory Interconnection Using Hitachi Flash Memory
SDRAM
HM52Y64165F
(Hitachi)
2.5 V–2.8 V
Flash
for Code
(HITACHI 32M)
(X8)
2.7 V–3.0 V
Flash
for Code
(HITACHI 32M)
(X8)
2.7 V–3.0 V
Flash
for Data
(HITACHI 32M)
(X16)
2.7 V–3.0 V
SRAM
JT5MM6A–AS
(TOSHIBA)
(X16)
2.7 V–3.0 V
CS GND Fixed
CLK
CKE
RAS
CAS
WE
DQMU
DQML
DQ[15:0]
BA[1:0]
A[11:0]
GND Fixed
BYTE
CE
RP
OE
WE
WP
R/B NC
A[20:–1]
DQ[7:0]
GND Fixed
BYTE
CE
RP
OE
WE
WP
R/B NC
A[20:–1]
DQ[7:0]
VCC
BYTE
CE
RP
OE
WE
WP
R/B NC
A[20:0]
DQ[15:0]
BVLZ
CE2
CE1
OE
R/W
A[18:0]
DQ[15:0]
LB
UB
BYTE VCC
Interfacing Memories With the OMAP5910 Device
R
fdata[7:0]
fdata[15:8]
Memory Interface Traffic Controller
OMAP5910
SDRAM_CLK
SDRAM.CKE
SDRAM.RAS
SDRAM.CAS
SDRAM.WE
SDRAM.DQMU
SDRAM.DQML
SDRAM.D[15:0]
SDRAM.BA[1:0]
SDRAM.A[11:0]
NC
SDRAM.A[12]
VCC
FLASH.RDY
FLASH.CS0
FLASH.RP
FLASH.OE
FLASH.WE
FLASH.WP
NC
FLASH.A[24]
FLASH.A[23:1]
FLASH.D[15:0]
FLASH.BAA
FLASH.ADV
FLASH.CLK
FLASH.CS1
FLASH.CS3
FLASH.BE[0]
FLASH.BE[1]
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