Fac Registers; Fac Interrupt - Texas Instruments OMAP5910 Technical Reference Manual

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Frame Adjustment Counter

7.16.3 FAC Interrupt

7.16.4 FAC Clocks and Reset
7.16.5 Software Interface
Table 7–146. FAC Registers
Register
Description
FARC
Frame adjustment reference count
FSC
Frame start count
CTRL
Control and configuration
STATUS
Status
SYNC CNT
Frame synchronization counter
START CNT
Frame start counter
7-202
The FAC generates 1 interrupt, FAC_IRQ (in halt mode when the FARC value
is met), connected to the MPU level 2 interrupt handler, line 0 (level-sensitive)
The FAC works with a clock (PCLK), which is provided by the ULPD from a
request generated by the USB function (DS_WAKE_REQ_ON).
The DS_WAKE_REQ_ON request does not wake-up the system itself.
The ULPD module uses this request to generate an interrupt (ULPD_nIrq) to
the MPU, which wakes up the system via its wake-up request (WKUP_REQ).
Once the system is awakened (12-MHz provided to the MPU), the MPU
programmable peripheral clock (PERCLK) is used as the source clock for the
FAC clock (for more detail, see Chapter 15, Clock Generation and System
Reset Management).
The MPU TIPB reset (MPU_PER_RST) resets the FAC.
Table 7–146 lists the FAC registers. Table 7–147 through Table 7–150
describe the register bits.
The FAC module is a word16 module with 32-bit aligned addresses.
Type
Address
R/W
FFFB:A800
R
FFFB:A804
R/W
FFFB:A808
R
FFFB:A80C
R
FFFB:A810
R
FFFB:A814

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