General-Purpose Input Register (Input_Latch) - Texas Instruments OMAP5910 Technical Reference Manual

MPU I/O
Table 7–12. MPU Input/Output Registers (Continued)
Register
GPIO_INT
KBD_MASKIT
GPIO_MASKIT
GPIO_DEBOUNCING_REG
GPIO_LATCH_REG
Table 7–13. General-Purpose Input Register (INPUT_LATCH)
Bit Name
15–0 INPUT_LATCH
Table 7–14. Output Register (OUTPUT_REG)
Bit Name
15–0 OUTPUT_REG
Table 7–15. Input/Output Control Register (IO_CNTL)
Bit Name
15–0 IO_CNTL
7-26
Description
GPIO interrupt
Keyboard mask interrupt
GPIO mask interrupt
GPIO debouncing
GPIO latch
Function
General-purpose inputs
Function
General-purpose outputs
Value Function
In/out control for general-purpose I/O
0 I/O is configured as output
1 I/O is configured as input
R/W Size Address
R 16 bits FFFB:5000
R/W 16 bits FFFB:5000
R/W 16 bits FFFB:5000
R/W 16 bits FFFB:5000
R 16 bits FFFB:5000
Offset
0x24
0x28
0x2C
0x30
0x34
Reset
Value
Reflects input
pins
Reset
Value
Undefined
Reset
Value
All bits at 1