Data Read Format-Two Shared Physical Channels - Texas Instruments OMAP5910 Technical Reference Manual

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Generic Channels

Figure 5–8. Data Read Format—Two Shared Physical Channels

The system DMA has nine physical channels; each has the capability to gener-

ate interrupts. The DMA has seven interrupt lines, some of which are shared

by two physical channels. Each of these seven interrupt lines is routed as an

interrupt input on the MPU level2 interrupt handler.

For a physical channel, all the sources are ORed together to generate one

interrupt. When an interrupt is issued by a physical channel, its status register

(DMA_CSR) is set to record the interrupt cause. The processor interrupt

service routine (ISR) can read this channel status register to find the source

of the interrupt. The status bits are automatically cleared after they are read.

One read in the status register clears all the status bits.

Interrupt line 0 (MPU level2 IRQ19) is shared by channel 0 and 6.

Interrupt line 1 (MPU level2 IRQ20) is shared by channel 1 and 7.

Interrupt line 2 (MPU level2 IRQ21) is shared by channel 2 and 8.

Interrupt line 3 (MPU level2 IRQ22) is dedicated to channel 3.

Interrupt line 4 (MPU level2 IRQ23) is dedicated to channel 4.

Interrupt line 5 (MPU level2 IRQ24) is dedicated to channel 5.

Interrupt line 6 (MPU level2 IRQ25) is dedicated to the LCD channel.

If simultaneous events occur in two physical channels that share the same

interrupt line, only one interrupt is generated, and all the relevant status bits

Each physical channel has a 7-bit status register. When an interrupt is shared

by two physical channels, the MPU can read the status from the two channels

in one TIPB access. Figure 5–8 shows the data read format for two shared

physical channels.

Physical channel 6

status register

This unique status is accessible either at channel 6 DMA_CSR, or at channel

0 DMA_CSR. Any MPU read (at channel 0 DMA_CSR address or at channel

1 DMA_CSR address) clears all status for the two channels.

When an interrupt is dedicated to 1 physical channel, the MPU can read the

status from this channel in one TIPB access. Figure 5–9 shows the data read

format for one physical channels.

Physical channel 0

status register