Dsp Boot Configuration Register (Dsp_Boot_Config) - Offset: X18 - Texas Instruments OMAP5910 Technical Reference Manual

Table 2–54. DSP Status Register (DSP_STATUS_REG) – Offset: x14 (Continued)
Bit Value Function
6 Idle peripherals
0 Functional mode
1 Idle
Linked to bit 4 of the ISTR register (from DSP)
5 Idle peripherals
0 Functional mode
1 Idle
LInked to bit 3 of the ISTR register (from DSP)
4 Interrupt acknowledged by the DSP (from DSP)
3 Output of TMS320C55x CPU ST3 register (from DSP),
which is the CPUAVIS bit
2 XF is a signal from the C55x DSP core. On standard
DSP devices such as the TMS320C5510, XF is con-
nected to a pin and used as an external flag. The
OMAP5910 device does not have an XF pin, so this bit
is provided to show tha value of the XF bit in the DSP
core status register (ST3)
1 Reset signal from MPU to DSP
0
Master reset (active low)
Table 2–55. DSP Boot Configuration Register (DSP_BOOT_CONFIG) – Offset: x18
Bit Function
15–10 Reserved
9–4 Reserved
3–0 DSP boot mode inputs (see Section 3.10.4, Boot Mode for DSP
Subsystem, for more detail.
MPU Interface
Value at
Hardware
Size Access Reset
1 R
1 R
1 R
1 R
1 R
1 R
1 R
Value at
Hardware
Size Access Reset
6 R/W
6 R/W
4 R/W
MPU Subsystem
1
1
1
1
1
1
1
0
0
0
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