Traffic Controller Registers; Traffic Controller Memory Interface Registers - Texas Instruments OMAP5910 Technical Reference Manual

Traffic Controller Memory Interface Registers

4.4 Traffic Controller Memory Interface Registers
Table 4–8. Traffic Controller Registers
Name
IMIF_PRIO
EMIFS_PRIO
EMIFF_PRIO
EMIFS_CONFIG_REG
EMIFS_CS0_CONFIG
EMIFS_CS1_CONFIG
EMIFS_CS2_CONFIG
EMIFS_CS3_CONFIG
EMIFF_SDRAM_CONFIG
EMIFF_MRS
TIMEOUT1
TIMEOUT2
TIMEOUT3
4-42
OMAP5910 traffic controller base address is 0xFFFE:CC00.
Table 4–8 lists the traffic controller registers. Table 4–9 through Table 4–27
describe the register bits.
The EMIF slow interface configuration register provides access to EMIFS
boot, operation, and power-down options (see Table 4–12).
Description
IMIF priority register
EMIF slow priority register
EMIF fast priority register
EMIF slow interface
configuration register
EMIF slow interface
chip-select configuration
register nCS0
EMIF slow interface
chip-select configuration
register nCS1
EMIF slow interface
chip-select configuration
register nCS2
EMIF slow interface
chip-select configuration
register nCS3
EMIF fast interface SDRAM
configuration register 1
EMIF fast interface SDRAM
MRS register
Timeout1
Timeout2
Timeout3
R/W Size Address
R/W 32 bits 0xFFFE:CC00
R/W 32 bits 0xFFFE:CC04
R/W 32 bits 0xFFFE:CC08
R/W 32 bits 0xFFFE:CC0C
R/W 32 bits 0xFFFE:CC10 0x0000 FFFB
R/W 32 bits 0xFFFE:CC14 0x0010 FFFB
R/W 32 bits 0xFFFE:CC18 0x0010 FFFB
R/W 32 bits 0xFFFE:CC1C 0x0000 FFFB
R/W 32 bits 0xFFFE:CC20
R/W 32 bits 0xFFFE:CC24
R/W 32 bits 0xFFFE:CC28
R/W 32 bits 0xFFFE:CC2C
R/W 32 bits 0xFFFE:CC30
Reset Value
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 00yy
(See
Table 4–12
for details on
the y values.)
0x0061 8800
0x0000 0037
0x0000 0000
0x0000 0000
0x0000 0000