Mmc Data Access Register (Mmc_Data) - Texas Instruments OMAP5910 Technical Reference Manual

Table 7–106. MMC Data Access Register (MMC_DATA)
Bit Name
15–0 DATA
Transmit/Receive FIFO Data Value (DATA)
The MMC data access register (MMC_DATA) is the entry point for the local
host to read data from, or write data into, the FIFO buffer. The FIFO size is
32 x 16bits (64 bytes). Bytes within a word are stored and read in little endian
format.
If the local host accesses this register byte-wise, the MSB (bits [15:8]) must
be always written/read first. A byte access to the LSB without a prior write into
the MSB results in having the MSB filled with 0x00.
Description
Transmit/receive FIFO data
In MMC/SD mode, this register field (bits 15-0) contains either the data packet
associated with block transfer (read or write), the CID contents for a
PROGRAM_CID (CMD26) command, or the CSD contents for a
PROGRAM_CSD (CMD27) command.
Since the block length is passed as an argument, it is legal for the local host
to perform only 16-bit accesses (read or write) to the buffer, even if the block
length is not an even number. In case of an odd number of bytes to read, the
upper byte of the last access always reads as 0x00. Conversely, for an odd
number of bytes to write, the upper byte must be filled with 0x00 for the last
data value.
In SPI mode, the register contains both the command (op-code and address
for a serial flash) and the data.
In SYSTEST mode, the FIFO behaves as a stack accessible only by the local
host (push and pop operations). In this mode, the set FIFO threshold values
are active, as are the associated interrupts and DMA, if enabled. This special
mode can be used for system test purpose.
Values after reset are low (all 16 bits).
A read access when the buffer is empty returns the previous read data value.
A write access when the buffer is full is ignored. In both events, the FIFO point-
ers are not updated and a remote access error (hardware error) is generated
(access qualifier). No remote error is generated if the local host performs a
16-bit access if the buffer contains a single byte.
MMC/SD Host Controller
MPU Public Peripherals 7-145