Gate And Inhibit Control 0 Register (Gate_Inh_Ctrl_0) - Texas Instruments OMAP5910 Technical Reference Manual

OMAP5910 Configuration Registers
Table 6–45. Pulldown Control 3 Register (PULL_DWN_CTRL_3) (Continued)
Bit Name
8 CONF_PDEN_MMC_DAT3_R
7–2 RESERVED
1 CONF_PDEN_CTS2_R
0 CONF_PDEN_RX2_R
Table 6–46. Gate and Inhibit Control 0 Register (GATE_INH_CTRL_0)
Bit Name
31–4 RESERVED
3 CONF_HIGH_IMP3
6-60
Value Description
This bit controls the pullup enable on
the OMAP5910 I/O, which defaults to
MMC.DAT3 at reset.
0 Pulldown enabled
1 Pulldown disabled
Reserved for future expansion. These
bits must always be written as 0.
This bit controls the pulldown enable
on the OMAP5910 I/O, which defaults
to UART2.CTS at reset.
0 Pulldown enabled
1 Pulldown disabled
This bit controls the pulldown enable
on the OMAP5910 I/O, which defaults
to UART2.RX at reset.
0 Pulldown enabled
1 Pulldown disabled
Value Description
Reserved for future expansion. These
bits must always be written as 0.
This bit is for control of
high-impedance on MCSI1.DOUT.
0 Normal function
1 Hi-impedance
Reset
R/W
Value
R/W 0x0
R/W 0x0
R/W 0x0
R/W 0x0
Reset
R/W
Value
R/W 0x0000000
R/W 0x0