Functional Multiplexing Control 0 Register (Func_Mux_Ctrl_0) - Texas Instruments OMAP5910 Technical Reference Manual

OMAP5910 Configuration Registers
Table 6–27. Functional Multiplexing Control 0 Register (FUNC_MUX_CTRL_0)
Bit Name
31 CTRL_288_1
30–23 RESERVED
22 LB_RESET_DISABLE
21 RESERVED
20 LRU_SEL
6-28
Value Description
This bit configures the control mode 288_1
which enables the control of the OMAP
chip_nwakeup signal from the static_valid pad.
0 Functional mode; ULPD controls the OMAP
chip_nwakeup signal.
1 Debug; the OMAP5910 static_valid pad controls
the OMAP chip_nwakeup signal.
This bit is valid in compatibility and native
modes.
Reserved. These bits must always be written as
0.
This bit holds the OMAP local bus reset input
active. Set this to 1 when using OMAP5910
USB_HHC module.
0 Local bus RESET <= 0
1 Local bus RESET <= USB_HHC LB reset
This bit is valid in compatibility and native
modes.
Reserved. This bit must always be written as 0.
This field configures the OMAP traffic controller
arbitration algorithm.
0 LRU priority scheme is used for arbitration.
1 Fixed priority scheme is used for arbitration.
This bit must only be changed if the DSP is in
reset. This bit is valid in compatibility and native
modes.
Reset
R/W
Value
R/W 0x0
R/W 0x0
R/W 0x0
R/W 0x0
R/W 0x0