Gpio Debouncing Register (Gpio_Debouncing_Reg) - Texas Instruments OMAP5910 Technical Reference Manual

Dual-core
Hide thumbs Also See for OMAP5910:
Table of Contents

Advertisement

Table 7–24. GPIO Debouncing Register (GPIO_DEBOUNCING_REG)
Bit
Name
15–9
Reserved
8–0
GPIO_
DEBOUNCING_REG
Note:
Because GPIO_CLK is an asynchronous signal, loading GPIO_DEBOUNCING_REG with 01 hex minimum value is rec-
ommended to ensure that you have a 31-µs minimum debouncing time. If the value is 00 hex, the interrupt may be gener-
ated immediately when an edge is met.
Table 7–25. GPIO Latch Register (GPIO_LATCH_REG)
Bit
Name
15–0
GPIO_LATCH_REG
Function
000000000: 0 µσ to 31 µs debouncing time
100000010: 7,97 ms to 8 ms debouncing time
Programming step is 31 µs.
Function
After debouncing time, the ARMI/O_IN bus is latched in
this.
MPU Public Peripherals
MPU I/O
Reset
Value
0000
Reset
Value
00
7-29

Advertisement

Table of Contents
loading

Table of Contents