Functional Multiplexing Control 1 Register (Func_Mux_Ctrl_1) - Texas Instruments OMAP5910 Technical Reference Manual

OMAP5910 Configuration Registers
Table 6–27. Functional Multiplexing Control 0 Register (FUNC_MUX_CTRL_0) (Continued)
Bit Name
12 PWR_MASK_OUT
11 BVLZ_MASK_IN
10 BVLZ_MASK_OUT
9–0 RESERVED
Table 6–28. Functional Multiplexing Control 1 Register (FUNC_MUX_CTRL_1)
Bits Name
31–0 RESERVED
6-30
Value Description
0 Does not allow AND gating of OMAP5910
outputs with COM_PWR_REQ (GPIO9) and
COM_STS (MPUIO3) OMAP5910 input pins
1 Allows AND gating of OMAP5910 outputs with
COM_PWR_REQ (GPIO9) and COM_STS
(MPUIO3) OMAP5910 input pins
This bit is valid in compatibility and native
modes.
0 Does not allow AND gating of OMAP5910
inputs with BFAIL/EXT_FIQ OMAP5910 input
pin
1 Allows AND gating of OMAP5910 inputs with
BFAIL/EXT_FIQ OMAP5910 input pin
This bit is valid in compatibility and native
modes.
0 Does not allow AND gating of outputs with
BFAIL/EXT_FIQ OMAP5910 input pin
1 Allows AND gating of outputs with
BFAIL/EXT_FIQ OMAP5910 input pin
This bit is valid in compatibility and native
modes.
Reserved. These bits must always be written as
0.
Description
Reserved. These bits must always be written as 0.
Reset
R/W
Value
R/W 0x0
R/W 0x0
R/W 0x0
R/W 0x0
Reset
R/W
Value
R/W 0x00000000