Fac Top-Level Diagram; Synchronization And Counter Control - Texas Instruments OMAP5910 Technical Reference Manual

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Figure 7–71. FAC Top-Level Diagram

MPU interrupt handler level 2

Clock generation and management

Because frame-start and frame-synchronization signals are from different

time domains, the FAC module synchronizes these two signals to the system

clock domain and uses the synchronized signals as the count enables. The

actual counters for frame synchronization and frame start are clocked by the

system clock.

The synchronization mechanism is based on the assumption that the system

clock is running at least eight times faster than frame synchronization and

frame start. Figure 7–72 and Figure 7–73 show the synchronization logic and

the counter hookup.

USB function

DS_WAKE_REQ_ON

Frame Adjustment Counter

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