Lcd Top Address For Frame Buffer 2-Lower Bits Register; Lcd Top Address For Frame Buffer 2-Upper Bits Register - Texas Instruments OMAP5910 Technical Reference Manual

5.6.1.3 LCD Top Address for Frame Buffer 2 Registers (DMA_LCD_TOP_F2_L and
DMA_LCD_TOP_F2_U)
Table 5–30. LCD Top Address for Frame Buffer 2—Lower Bits Register
(DMA_LCD_TOP_F2_L)
Bit Name
15–1 LCD_TOP_F2_
L[15–1]
0 LCD_TOP_F2_
L[0]
Table 5–31. LCD Top Address for Frame Buffer 2—Upper Bits Register
(DMA_LCD_TOP_F2_U)
Bit Name
15–0 LCD_TOP_F2_
L[31–16]
The LCD top address registers are two 16-bit registers that contain the start
address for the video RAM buffer 2. The 32-bit address is obtained by the
concatenation of the two 16-bit words as described here:
LCD_TOP_F2 = DMA_LCD_TOP_F2_U & DMA_LCD_TOP_F2_L
Note:
LSB of the 32-bit word is equal to zero. Address of video buffer must always
be even.
Description
LCD top address for frame buffer 2 lower bits [15–1]
Address bit 0. Fixed at 0 since address must be even.
Description
LCD top address for frame buffer 2 upper bits [31–16]
Type
RW
R
Type
RW
System DMA Controller
Registers
Reset
Value
Undefined
0
Reset
Value
Undefined
5-57