Dsp Boot Configuration; Dsp/Mpu Shared Peripherals - Texas Instruments OMAP5910 Technical Reference Manual

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System Operating Details

3.10.3 DSP/MPU Shared Peripherals

3.10.4 Boot Mode for DSP Subsystem
Table 3–12. DSP Boot Configuration
Relative Word
Register Name
Address
0x00000F
DSP_BOOT_CONFIG
3-40
The DSP/MPU shared peripherals are designed with two TIPB connections,
one for the DSP public TIPB and another for the MPU public TIPB. This dual
connection provides a flexible communications scheme where either the DSP
domain or the MPU domain can access a peripheral without monopolizing the
alternate processor public peripheral bus. The DSP/MPU shared peripherals
consist of the following modules, which are described in detail in Chapter 10,
MPU/DSP Shared Peripherals.
-
Mailbox registers for interprocessor communication
-
General-purpose I/O (GPIO)
-
Three UARTs: UART1, UART2, UART3
These peripherals can be clocked by signals from the DSP subsystem CLKM2
module or the MPU subsystem CLKM1 module.
The access rate to these peripherals via the DSP is configured by the strobe2
control bits in the TIPB CMR register. See Section 3.5.1, Control Mode
Register.
The OMAP5910 device contains a bootloader that is a ROM-based utility
residing in the DSP subsystem ROM. It consists of a program (code) that facili-
tates downloading (bootloading) of DSP code into the DSP subsystem internal
memory from either the DSP EMIF interface to the traffic controller or the MPUI
interface when it is held in reset by the MPU. The boot mode used by the DSP
subsystem bootloader is specified by the MPU using the DSP_BOOT_CON-
FIG register when it is released from reset by the MPU. This register is read-
only for the DSP and is mapped to address 0x000F in the DSP I/O space (with-
in the DSP TIPB address space). The register is read/write for the MPU and
appears at address 0xFFFE:C900 in the MPUI address space. The MPU
controls the boot process by programming bits BOOT_MOD[3:0] while the
DSP subsystem is held in reset state. Table 3–12 shows the DSP boot
configuration.
Bits
BOOT_MODE [3:0]
Reset Value
Depends on external
implementation

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