Module Configuration Control 0 Register (Mod_Conf_Ctrl_0) - Texas Instruments OMAP5910 Technical Reference Manual

OMAP5910 Configuration Registers
Table 6–49. Module Configuration Control 0 Register (MOD_CONF_CTRL_0)
Bit Name
31 CONF_MOD_UART3_
CLK_MODE_R
30 CONF_MOD_UART2_
CLK_MODE_R
29 CONF_MOD_UART1_
CLK_MODE_R
28 MOD_MCBSP3_MODE_R
27–24 MOD_32KOSC_SW_R
6-64
Value Description
This bit determines the clock source of
UART3 on the OMAP5910 device.
0 12 MHz
1 48 MHz
This bit determines the clock source of
UART2 on the OMAP5910 device.
0 32 kHz/12 MHz (see Chapter 12, UART
Devices)
1 48 MHz
This bit determines the clock source of
UART1 on the OMAP5910 device.
0 12 MHz
1 48 MHz
This bit determines the method of frame
synchronization wrap-around used on
MCBSP3.
0 Wrap-around done in hardware external to
the McBSP.
1 Wrap-around disabled. Wrap around can
be performed within the McBSP module.
Modes documented in Chapter 9, DSP
Public Peripherals.
These bits determine the configuration of
the the 32-kHz oscillator. The reset
condition corresponds to a fast start-up
time.
1011 Fast start-up time
1000 Lowest-power mode
These bits are forced to 1011 during reset
and in compatibility mode. The user must
take care to program these bits
appropriately before entering native mode.
Reset
R/W
Value
R/W 0x0
R/W 0x0
R/W 0x0
R/W 0x0
R/W 0x0