Mmc Command Time-Out Register (Mmc_Cto) - Texas Instruments OMAP5910 Technical Reference Manual

Table 7–103. MMC Command Time-out Register (MMC_CTO)
Bit Name
15 –8 Reserved
7–0 CTO
Command Time-out Value (CTO)
The 16-bit MMC command time-out register (MMC_CTO) specifies the
maximum number of clock cycles before a command time-out condition
occurs.
Description
MMC command time-out value.
MMC/SD mode only.
The local host sets this field (bits 7:0) based on N
SD card specifies N
CR
If the card does not respond within the specified number of cycles, command
time-out gets set to 1 in MMC_STAT[7] register bit.
For MMC card interrupt mode support, this time-out is disabled when the
command passes with an R5 response (CMD40).
-
0x00: Command time-out disabled
-
0x01: One clock cycle
-
0xFD: 253 clocks cycles (2
The 0xFF and 0xFE cannot be used.
Values after reset are low (all 8 bits).
to be between 2 and 64 clock cycles.
8
– 3)
MPU Public Peripherals
MMC/SD Host Controller
clock cycles. MMC and
CR
7-143