Table 7–26. MicroWire Registers (Continued)
Register
Description
SR3
Setup 3
SR4
Setup 4
SR5
Setup 5
Table 7–27. Transmit Data Register (TDR)
Bit
Name
15–0
TD
Note:
MSB (bit 15) is the first transmitted bit.
Table 7–28. Receive Data Register (RDR) – Offset address (hex): 0x00
Bit
Name
15–0
TD
Note:
LSB (bit 0) is the last received bit.
Function
Data to transmit
Whatever its size, the word must be aligned on the most significant bit (MSB)
side.
Function
Received data
Whatever its size, the word is aligned on the least significant bit (LSB) side.
R/W
Size
Address
R/W
16 bits
FFFB:3000
R/W
16 bits
FFFB:3000
R/W
16 bits
FFFB:3000
MPU Public Peripherals
MicroWire Interface
Offset
0x10
0x14
0x18
Reset
Value
Undefined
Reset
Value
Undefined
7-31