Timer Registers - Texas Instruments OMAP5910 Technical Reference Manual

Timer Description
6.2.2

Timer Registers

Table 6–4. Timer Registers
Register
CNTL_TIMER
LOAD_TIM
READ_TIM
Table 6–5. Control Timer Register (CNTL_TIMER)
Bits Name
31–7 RESERVED
6 FREE
5 CLOCK_ENABLE
4–2 PTV
1 AR
0 ST
6-6
Table 6–4 lists the timer registers. Table 6–5 through Table 6–7 describe the
register bits.
Base address for timer 1: FFFE:C500
Base address for timer 2: FFFE:C600
Base address for timer 3: FFFE:C700
Bit width: 32 bits
Timer 1, Timer 2, and Timer 3
Descriptions
Control timer
Load timer
Read timer
Value Description
FREE bit
0 Timer stops counting in suspend mode.
1 Timer continues counting in suspend mode.
External timer clock enable
Prescale clock timer value (see Table 6–2)
0 One-shot timer
1 Autoreload timer
0 Stop timer
1:
1 Start timer
R/W Size
R/W 32 bits
W 32 bits
R 32 bits
Offset Reset Value
x00 0x0000 0000
x04 U
x08 U
Reset
Value
0
0
0
0
0