Mcbsp1 Interface Diagram - Texas Instruments OMAP5910 Technical Reference Manual

Figure 9–2. McBSP1 Interface Diagram
DSP
DMA
DSP level 2
interrupt handler
System
DMA
MPU level 2
interrupt handler
DSP peripheral
bridge
Clock generation
and management
Note: You can use the AUXON feature to gate the functional clock to the McBSP1 module by setting MOD_CONF_CTRL_0[18]
to 1.
RX (DMA_REQ_9)
TX (DMA_REQ_8)
RX interrupt (IRQ_3)
TX interrupt (IRQ_2)
RX (DMA_REQ_9)
TX (DMA_REQ_8)
RX interrupt (IRQ_13)
TX interrupt (IRQ_12)
DSP public
peripheral bus 16
DSPPER_nRST
DSPXOR_CK
(12 MHz)
McBSP1
DMA
CLKS
requests
FSX_OUT
FSX_OE
FSX_IN
CLKX_OUT
Interrupts
CLKX_OE
CLKX_IN
DX_OUT
DX_OE
MPU
I/F
FSR_OUT
FSR_OE
FSR_IN
CLKR_OUT
CLKR_OE
CLKR_IN
Reset
DR_IN
DSP Public Peripherals
McBSP1
OMAP5910
MCBSP1.CLKS
MCBSP1.FSX
MCBSP1.CLKX
MCBSP1.DX
0
MCBSP1.DR
9-5