Chip-Select Control (Spi Mode) - Texas Instruments OMAP5910 Technical Reference Manual

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Chip-Select Mode (CSM)

Chip-Select Disable (CSD)

Table 7–111. Chip-Select Control (SPI Mode)

When this bit (3) is set to 0 and enabled (CSD=0), the selected CS signal pin

goes active (low) only when SPI transfer is started and brought back automati-

cally to its inactive state (high), when the SPI transfer completes.

When set to 1, the automatic control of the CS signal is disabled. Instead, the

selected CS signal pin is manually controlled by the chip-select disable regis-

ter bit (CSD). This mode provides support for complex SPI transfer scheme

that requires CS to be kept active during the entire transfer (ex: MMC card write

with busy condition).

0: Automatic mode

1: Manual mode (controlled by CSD)

Value after reset is low.

When this bit (2) is set to 0, the selected CS signal is asserted to its active (low)

state either automatically when CSM = 0, or manually when CSM = 1.

When set to 1, the selected CS signal is forced to its inactive (high) state. It can

be used to send dummy clocks with CS inactive to a MMC or SD card.

0: Selected CS is conditionally asserted (low).

1: Selected CS is deasserted (high).

Value after reset is low.

High-low-high

Automatic mode: CS asserted active (low) during SPI

Automatic mode: CS forced inactive (high)

Manual mode: CS asserted active (low)

Manual mode: CS asserted inactive (high)

MPU Public Peripherals

MMC/SD Host Controller