Signal Pads - Texas Instruments OMAP5910 Technical Reference Manual

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Table of Contents

Inter-Integrated Circuit Controller

C Controller Signals Pads

Table 7–50. Signal Pads

Table 7–51. Reset State of I

Data is communicated to devices interfacing the I

(SDA) and the serial clock pin (SCL). These two wires carry information be-

tween the OMAP5910 device and others connected to the I

and SCL are bidirectional pins. They must be connected to a positive supply

voltage via a pullup resistor. When the bus is free, both pins are high. The

driver of these two pins has an open-drain to perform the required wired-AND

function. Table 7–50 lists the signal pads. Table 7–51 lists the reset state of the

C serial CLK line.

Open-drain output buffer—requires external pullup resistor (Rp)

C serial data line.

Open-drain output buffer—requires external pullup resistor (Rp)

System Reset

High impedance

The master device generates one clock pulse for each data bit transferred.

Due to variety of different technology devices (CMOS, NMOS, bipolar) that can

be connected to the I

fixed and depend on the associated level of VDD.

C Reset (I2C_EN =0)

High impedance

C bus, the levels of logical 0 (low) and 1 (high) are not

C via the serial data pin

C bus. Both SDA