Functional Multiplexing Control 2 Register (Func_Mux_Ctrl_2) - Texas Instruments OMAP5910 Technical Reference Manual

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Table 6–29. Functional Multiplexing Control 2 Register (FUNC_MUX_CTRL_2)
Bits
Name
31–19
RESERVED
18:13
DMAREQ_OBS
12:6
IT_OBS
5–0
RESERVED
Description
Reserved. These bits must always be written as 0.
This 6-bit field can be used to control the DMA re-
quests observability mux.
When a 6-bit value is written in this field, the corre-
sponding interrupt signal is output on the
UART3.RX pin for visibility.
Legal values are from 0 to 50. 0 is the functional
mode, values between 1 and 50 are for
observability mode.
0: Default; for i = 1 to 19: observability, pin
UART3.RX <= DSP DMA request(i), output; for i =
20 to 50: observability, pin UART3.RX <= system
DMA request(i–20), output
This 7-bit field can be used to control the interrupt
observability mux.
When a 7-bit value is written in this field, the corre-
sponding interrupt signal is output on the
UART3.TX pin for visibility.
Legal values are from 0 to 101. 0 is the functional
mode; values between 1 and 101 are for
observability mode.
0: Default; for i in 1 to 16: observability, UART3.TX
pin <= DSP level2 interrupt(i–1);
for i in 17 to 37: observability, UART3.TX pin <=
DSP level1 interrupt(i–17);
for i in 38 to 69: observability, UART3.TX pin <=
MPU level1 interrupt(i–38);
for i in 70 to 101: observability, UART3.TX pin <=
MPU level2 interrupt(i–70);
Reserved. These bits must always be written as 0.
At reset, the OMAP5910 device configuration registers are software compat-
ible with previous prototype devices. Writing an 0x0000EAEFh to the compati-
bility mode control 0 register (COMP_MODE_CTRL_0) enables the new
functional multiplexing registers found at offset 0x10h and above.
OMAP5910 Configuration Registers
R/W
R/W
R/W
R/W
R/W
MPU Private Peripherals
Reset
Value
0x00000000
0x0000
0x0000
0x00000000
6-31

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