Led Pulse Generator Receive And Transmit Registers; Lpg Design - Texas Instruments OMAP5910 Technical Reference Manual

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LPG Power Management

LPG Registers

Table 7–73. LED Pulse Generator Receive and Transmit Registers

Power management

LCR bit 6 = 0 resets the whole pulse generator circuit (but not the control regis-

ter) and switches off the LED. It is possible to switch on the LED independently

from the pulse generator circuit with bit 7 of the LCR (1 = permanent light). A

device reset causes a reset to the whole LPG (with the control register) and

the output LPG_LED to zero asynchronously.

Because the TIPB write to the LPG control register is asynchronous, the value

written to the control register may be unstable for one blink period. Conse-

quently, the LED output could, in the worst case, be switched on at maximum

intensity during one additional blink period.

The LPG input clock comes from the 32-kHz ULPD clock, because it must work

even when the OMAP5910 system is in deep sleep mode. The internal clock

of the LPG runs with 256 Hz. For this reason the power consumption of this

block can be neglected. Nevertheless, switch the LPG_CLK off if LPG is not

Both receive and transmit registers are mapped in the MPU address space.

Two instances of LPG are mapped in the OMAP5910 device:

First LPG: LPG_1 address is FFFB:D000

Second LPG: LPG_2 address is FFFB:D800

Table 7–73 lists the LPG receive and transmit registers. Table 7–74 and

Table 7–77 describe the register bits.

MPU Public Peripherals

LED Pulse Generator

Offset (hex)