Dsp Mpui Configuration Register (Dsp_Api_Config) - Offset: X1C; Decoding Saram 0 Through Saram 11 On 8K Boundaries - Texas Instruments OMAP5910 Technical Reference Manual

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MPU Interface
Table 2–56. DSP MPUI Configuration Register (DSP_API_CONFIG) – Offset: x1C
Bit
Function
15–0
APISIZE: Specify which blocks of SARAM are accessible by the
MPUI in HOM (exclusive access).
The amount of SARAM is calculated by this formula:
API_SIZE/2) * 8K bytes, starting from SARAM0
Table 2–57. Decoding SARAM 0 Through SARAM 11 on 8K Boundaries
0X0000 – 0X0001
0X0002 – 0X0003
0X0004 – 0X0005
0X0006 – 0X0007
0X0008 – 0X0009
0X000A – 0X000B
0X000C – 0X000D
0X000E – 0X000F
0X0010 – 0X0011
0X0012 – 0X0013
0X0014 – 0X0015
0X0016 – 0X0017
0X0018 – OTHERS
Notes:
1) 0: Shared-access RAM
2) 1: Host-only RAM (no DSP access)
2-64
Table 2–57 decodes SARAM 0 through SARAM 11 on 8K boundaries.
APISIZE (15..0)
Size
Access
16
R/W
SARAM
11
7
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0001
0000
0011
0000
0111
0000
1111
0001
1111
0011
1111
0111
1111
1111
1111
Value at
Hardware
Reset
0xFFFF
3
0
0000
0001
0011
0111
1111
1111
1111
1111
1111
1111
1111
1111
1111

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