Mcbsp3 Interrupt Mapping; Dma Request Mapping-Mcbsp3 - Texas Instruments OMAP5910 Technical Reference Manual

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McBSP3
9.4.2

McBSP3 Interrupt Mapping

Table 9–13. McBSP3 Interrupt Mapping
9.4.3
McBSP3 DMA Request Mapping
Table 9–14. DMA Request Mapping—McBSP3
9.4.4
McBSP3 Application Example: Optical Interface
9-14
Table 9–13 identifies the McBSP3 interrupts. McBSP3 generates level 2
interrupts for both the DSP and the MPU.
Incoming Interrupts
McBSP3 TX interrupt
McBSP3 RX interrupt
Table 9–14 identifies McBSP3 DMA request lines.
DMA Request Source
McBSP3 TX
McBSP3 RX
With the assistance of two GPIOs, McBSP3 is configured to connect to an
external optical audio interface (see Figure 9–6) device such as the Sanyo
LC89051V. The CLKS signal is the active input clock for the McBSP modem
block. The active input clock can be changed in a McBSP register, but activity
on CLKS is required to perform the set up and write to the McBSP register.
Section 9.4.4.1 through Section 9.4.4.12 explain the McBSP register setup for
optical interface with 8-bit transfer per frame in SPI master mode and GPIO
mode.
Level 2 DSP Interrupt
IRQ_00
IRQ_01
DMA Request Line—DSP
DMA_REQ_10
DMA_REQ_11
Level 2 MPU Interrupt
IRQ_10
IRQ_11
DMA Request Line—
MPU
DMA_REQ_10
DMA_REQ_11

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