Mcsi1 Pin Descriptions; Mcsi1 Interrupt Mapping; Tdma Request Mapping-Mcsi1 - Texas Instruments OMAP5910 Technical Reference Manual

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Table of Contents

MCSI1 Pin Description

Table 9–38. MCSI1 Pin Descriptions

Table 9–39. MCSI1 Interrupt Mapping

MCSI1 DMA Request Mapping

Table 9–40. TDMA Request Mapping—MCSI1

This section provides information specific to MCSI1 (Figure 9–29) on the

OMAP5910 device.

Table 9–38 identifies the MCSI1 I/O pins.

I/O Direction

Table 9–39 identifies the MCSI1 interrupt mappings. MCSI1 generates level

2 interrupts for both the DSP and the MPU. Only one MPU MCSI1 interrupt

covers TX, RX, and frame error conditions; software must check the MCSI1

status register to determine the interrupt source.

Incoming Interrupts

MCSI1 TX interrupt

MCSI1 RX interrupt

MCSI1 Frame Error

Table 9–40 identifies MCSI1 DMA request lines.

DMA Request Source DMA Request Line—DSP DMA Request Line—MPU

Frame synchronization

Level 2 DSP Interrupt

Level 2 MPU Interrupt