Frequency Range - Texas Instruments OMAP5910 Technical Reference Manual

Traffic Controller Memory Interface Registers
Table 4–17. SDRAM Internal Organization (Continued)
Table 4–18. Frequency Range
4-50
Register Value
1010
1011
1100
1101
1110
1111
† Unavailable bank number (not supported). Do not use this setting.
Note: Reset value = 0x0h.
ac Parameters
t
rc
t
ras
t
rp
t
rcd
†
t
rrd
‡
t (trwl)
dpl
t
dal
t
rsc
† Write is never interrupted by precharge command directly.
‡ Neither read or write with auto-precharge is supported.
Memory Size
(M Bits) Size Of Data Bus
256
SDF0
(Cycles)
9
5
3
3
2
–
–
2
Number Of
Banks
16 2
16
8 2
8
16 2
16
SDF1 SDF2
(Cycles) (Cycles)
5 3
3 2
2 2
2 2
2 2
– –
– –
2 2
†
4
†
4
†
4
SDF3
(Cycles)
2
2
2
2
2
–
–
–