Functional Multiplexing Control 9 Register (Func_Mux_Ctrl_9) - Texas Instruments OMAP5910 Technical Reference Manual

Table 6–37. Functional Multiplexing Control 9 Register (FUNC_MUX_CTRL_9)
Bits Name
31–30 RESERVED
29–27 CONF_UARTS_CLKREQ_R
26–24 CONF_MCSI1_DOUT_R
23–21 CONF_TX1_R
20–15 RESERVED
14–12 CONF_RTS1_R
11–6 RESERVED
5–3 CONF_MCBSP3_CLK_R
2–0 CONF_COM_
SHUTDOWN_R
Description
Reserved for future expansion. These bits must
always be written as 0.
These bits control the multiplexing on the
OMAP5910 I/O, which defaults to
UART3.CLKREQ at reset.
The control for this I/O is forced to 000 at reset
and in compatibility mode.
These bits control the multiplexing on the
OMAP5910 I/O, which defaults to MCSI1.DOUT
at reset.
The control for this I/O is forced to 000 at reset
and in compatibility mode.
These bits control the multiplexing on the
OMAP5910 I/O, which defaults to UART1.TX at
reset.
The control for this I/O is forced to 000 at reset
and in compatibility mode.
Reserved for future expansion. These bits must
always be written as 0.
These bits control the multiplexing on the
OMAP5910 I/O, which defaults to UART1.RTS at
reset.
The control for this I/O is forced to 000 at reset
and in compatibility mode.
Reserved for future expansion. These bits must
always be written as 0.
These bits control the multiplexing on the
OMAP5910 I/O, which defaults to
MCBSP3.CLKX at reset.
The control for this I/O is forced to 000 at reset
and in compatibility mode.
These bits control the multiplexing on the
OMAP5910 I/O, which defaults to
RST_HOST_OUT at reset.
The control for this I/O is forced to 000 at reset
and in compatibility mode.
OMAP5910 Configuration Registers
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
MPU Private Peripherals
Reset
Value
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
6-39