Level 1 Descriptors; Level 1 Fine Page Table Descriptor; Interpreting Level 1 Descriptor Bits - Texas Instruments OMAP5910 Technical Reference Manual

MPU Memory Management Unit
2.7.6.3 Level 1 Descriptor
Figure 2–13. Level 1 Descriptors
31
Coarse Page Table Base Address
Section Base Address
Fine Page Table Base Address
Note: Bits in gray areas are ignored. They must be written to as 0. The two least significant bits indicate the descriptor type and
validity and are interpreted as shown below.
Table 2–17. Level 1 Fine Page Table Descriptor
Bit Name
31–12 FINE_PG_BASE
11–9 RESERVED
8–5 DOMAIN
4 RESERVED
3–0 RESERVED
1–0 RESERVED
Table 2–18. Interpreting Level 1 Descriptor Bits 1–0
2-32
The level 1 descriptor returned is either a coarse or fine page table descriptor
or a section descriptor. Its format varies accordingly, as shown in Figure 2–13.
2019
Function
Base address used to access the fine page table entry. The fine page
table index selecting an entry is derived from the virtual address as
illustrated in Figure 2–16, Tiny Page Translation.
Reserved. Must be written as 0.
Specify which one of the sixteen domains (held in the domain access
control register) contains the primary access controls.
Reserved. Must be written to as 1 for backward compatibility.
Reserved. Must always be written as 0.
Reserved. Must always be written as 1.
If a page table descriptor is returned from the level 1 fetch (Bit 0 = 1), a level
2 fetch is initiated.
Value Meaning
00 Invalid
01 Coarse
10 Section
11 Fine
12 11 10 9 8
Domain
AP Domain
Domain
Notes
Generates a section translation fault
Indicates a coarse page descriptor
Indicates a section descriptor
Indicates a fine page descriptor
5 4 3 2 1 0
0 0 Fault
Coarse
1 0 1
Page
Section
1 C B 1 0
Fine
1 1 1
Page