Mpui Simplified Block Diagram; Mpu Interface - Texas Instruments OMAP5910 Technical Reference Manual

2.9 MPU Interface

Figure 2–22. MPUI Simplified Block Diagram
TI
peripheral
bus
The MPU interface (MPUI) allows the TI925T and the system DMA controller
to communicate with the DSP and its peripherals via the DSP MPUI port (part
of the DSP); see Figure 2–22. The MPUI provides the capability for the TI925T
and the system DMA controller to access the full memory space (16M bytes)
of the DSP and the DSP peripheral buses, except the private peripherals.
Thus, the TI925T and the system DMA controller have both read and write
access to the complete DSP I/O space (128K bytes), including the control
registers of the internal DSP peripherals such as the DSP TIPB bridge itself.
MPUI interface
Control and
configuration
registers
MPU bus interface
MPU bus
To DSP MPUI port
16
(programmable priority scheme)
MPU bus
32
MPU Interface
Arbiter
System DMA
controller interface
(API port)
MPUI data port
32
MPU Subsystem 2-55