Mcbsp2 - Texas Instruments OMAP5910 Technical Reference Manual

McBSP2

7.10 McBSP2
7-104
Multichannel buffered serial ports (McBSPs) are configurable, high-speed,
full-duplex serial ports that allow direct interfacing to external communication
devices. There are three McBSPs on OMAP5910. McBSP2 is on the MPU
public peripheral bus and is covered briefly in this section. McBSP1 and
McBSP3 are on the DSP public peripheral bus and are covered briefly in
Chapter 9, DSP Public Peripherals. For more detail on the functions of all three
McBSPs, see the TMS320C55x DSP Peripherals Reference Guide (literature
number SPRU317).
Key features of McBSP2 include:
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Full-duplex communication
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DMA support for both RX and TX transfers
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Double-buffered data registers, which allow a continuous data stream
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Independent framing and clocking for receives and transmits
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External shift clock generation or an internal programmable frequency
shift clock
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Multichannel transmits and receives of up to 128 channels.
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A wide selection of data sizes, including 8-, 12-, 16-, 20-, 24-, or 32-bits
µ-Law and A-Law companding
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Data transfers with LSB or MSB first
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Programmable polarity for both frame synchronization and data clocks
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Highly programmable internal clock and frame generation
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RX and TX interrupts as well as RX data overrun interrupt
The operation of the three OMAP5910 McBSPs is consistent with SPRU317
with the following exceptions and clarifications:
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Only DXENA = 0 setting is supported
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The transmit output (DX) pins don not go to high-impedance state when
the transmitter is not actively sending data. In other words, the OMAP5910
always actively drives the DX pins.
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The CLKS input is only available on McBSP1.
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On McBSP1 and McBSP3, the receiver can only operate in slave mode.
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BIS is not supported.