Dsp Timers - Texas Instruments OMAP5910 Technical Reference Manual

8.2 Timers
Figure 8–2. DSP Timers
DSPTIM_CK
12 MHz
DSPWD_CK
0.86 MHz(12 MHz/14)
Figure 8–2 shows the DSP timers in detail.
Three 32-bit timers are available for general-purpose housekeeping functions.
The counters/timers are configurable either in autoreload or in one-shot mode
with on-the-fly read capability. Each timer generates a corresponding level 1
interrupt to the DSP when equal to zero, as shown in Table 8–1, Timer Interrupt
Levels.
32-bit timer
CLK
Divide clock down by
2^ (PTV+1)
Watchdog timer (16 bit)
CLK
Divide clock down by
2 (PTV+1)
LOAD_TIM_HI
LOAD_TIM_LO
Load when timer starts.
CLK / 2^ (PTV+1)
READ_TIM_HI
READ_TIM_LO
Timer 1: INT23
Timer 2: INT22
Timer 3: INT8
LOAD_TIM
Load when timer starts.
CLK / 2 (PTV+1)
READ_TIM
Watchdog mode: DSP reset
Timer mode: INT13
DSP Private Peripherals
Timers
If autoreload, then
load when timer
underflows.
Interrupt when timer
underflows.
If autoreload, then
load when timer
underflows.
Reset or interrupt
when timer underflows
8-3