Programming The Watchdog Timer In Watchdog Mode - Texas Instruments OMAP5910 Technical Reference Manual

Watchdog Timer
8.3.1

Programming the Watchdog Timer in Watchdog Mode

8.3.2 Programming the Watchdog Timer in Timer Mode
8-12
On power up, the watchdog timer is enabled in the watchdog mode and the
value loaded into the load timer register is set to the maximum value (0xFFFF).
This gives the user a duration of 16,777,216 * t
or write a new value (different from 0xFFFF) into the load timer register.
The user program or the OS must write periodically to the load timer register
(LOAD_TIM) before the counter underflows. The new loaded value must be
different from the previous because the write is taken into account only if the
newly loaded value is different from the previous one. Due to internal sequenc-
ing, the user must wait for three timer clock periods before writing a new value
into the load timer register. If the input clock is 12 MHz, three timer clock
periods are approximately 3.5 µs.
You can not disable the watchdog timer by only clearing bit 15 (WATCHDOG)
of the timer mode register (TIMER_MODE). Once the timer has been config-
ured as a general-purpose timer, it can be switched back to watchdog mode
by writing a 1 to bit 15 (WATCHDOG) of the timer mode register (TIM-
ER_MODE). In this case, the value loaded into the load timer register
(LOAD_TIM) is set to the maximum value (0xFFFF) as on power-up.
In watchdog mode, the control timer register (CNTL_TIMER) must not be
used. The watchdog timer can not be stopped by clearing bit 7 (ST), and the
prescale value is 7 regardless of the PTV field. Autoreload and one-shot do
not apply, because if the counter underflows the processor is reset and the
watchdog registers are reinitialized.
To start a timer, set the start timer (ST) bit of the control timer register to 1.
Reset the bit to 0 to stop the timer. When the timer stops, the decrementer
content is frozen.
Set the autoreload (AR) bit of the control timer register to 0 to decrement from
the loaded value down to zero and then stop. Set the AR bit to 1 to continue.
A new value from the load register is loaded into the timer when it passes
though zero or when it starts. An interrupt is produced when the corresponding
timer is equal to zero.
To avoid undefined results, do not program the PTV and AR bits or the load
register while the timer is running. You can set the PTV bits to values other than
7 when the watchdog timer is in timer mode.
The timer value is held in the read timer register and can be read while the timer
is running or stopped.
The base word address for watchdog timer is 0x003400.
to change the timer mode
clk