Voltage Control 0 Register (Voltage_Ctrl_0) - Texas Instruments OMAP5910 Technical Reference Manual

OMAP5910 Configuration Registers
Table 6–47. Voltage Control 0 Register (VOLTAGE_CTRL_0)
Bit Name
31–3 RESERVED
2 CONF_VOLTAGE_COMIF_R
1 CONF_VOLTAGE_SDRAM_R
6-62
Value Description
Reserved for future expansion.
These bits must always be written
as 0.
This bit controls the drive strength
of the OMAP5910 communication
processor interface I/O. This
allows the interface to be run at 1.8
V nom or 2.75 V nom.
0 Drive strength is 1.80 V
1 Drive strength is 2.75 V
At reset and in compatibility mode,
the interface is set for 2.75-V
operation. This register only
controls the interface in
OMAP5910 mode.
This bit controls the drive strength
of the OMAP5910 SDRAM
interface I/O. This allows the
interface to be run at 1.8 V nom or
2.75 V nom.
0 Drive strength is 1.80 V
1 Drive strength is 2.75 V
At reset and in compatibility mode,
the interface is set for 2.75-V
operation. This register only
controls the interface in
OMAP5910 mode.
Reset
R/W
Value
R/W 0x0000000
R/W 0x0
R/W 0x0